pc87317vul National Semiconductor Corporation, pc87317vul Datasheet - Page 108

• Manufacturer Part Number: pc87317vul
• Description: Pc87317vul/pc97317vul Superi/o Plug And Play Compatible With Acpi Compliant Controller/extender
• Manufacturer: National Semiconductor Corporation

www.national.com
Bit 0 - Missing Address Mark
Bit 1 - Drive Write Protected
Bit 2 - Missing Data
Bit 3 - Not Used
Bit 4 - Overrun or Underrun
Bit 5 - CRC Error
Bit 6 - Not Used
This bit indicates whether or not the Floppy Disk Con-
troller (FDC) failed to find an address mark in a data field
during a read, scan, or verify command.
0: No missing address mark.
1: Address mark missing.
When a write or format command is issued, this bit indi-
cates whether or not the selected drive is write protect-
ed, i.e., the WP signal is active.
0: Selected drive is not write protected, i.e., WP is not
1: Selected drive is write protected, i.e., WP is active.
This bit indicates whether or not data is missing for one
of the following reasons:
— Controller cannot find the sector specified in the
— Controller cannot read any address fields without a
— Controller cannot find starting sector during execu-
0: Data is not missing for one of these reasons.
1: Data is missing for one of these reasons.
This bit is not used and is always 0.
This bit indicates whether or not the FDC was serviced
by the microprocessor soon enough during a data trans-
fer in the execution phase. For read operations, this bit
indicates a data overrun. For write operations, it indi-
cates a data underrun.
0: FDC was serviced in time.
1: FDC was not serviced fast enough. Overrun or un-
This bit indicates whether or not the FDC detected a Cy-
clic Redundancy Check (CRC) error.
0: No CRC error detected.
1: CRC error detected.
This bit is not used and is always 0.
Bit 0 of the result phase Status register 2 (ST2) in-
dicates the when and where the failure occurred.
See Section 5.5.3 "Result Phase Status Register 2
(ST2)" on page 108.
active.
command phase during the execution of a read,
write, scan, or VERIFY command. An Address Mark
(AM) was found however, so it is not a blank disk.
CRC error during a READ ID command.
tion of READ A TRACK command.
derrun occurred.
Bit 5 of the result phase Status register 2 (ST2) in-
dicates when and where the error occurred. See
Section 5.5.3 "Result Phase Status Register 2
(ST2)".
The Digital Floppy Disk Controller (FDC) (Logical Device 3)
108
Bit 7 - End of Track
5.5.3
Bit 0 - Missing Address Mark Location
Bit 1 - Bad Track
Bit 2 - Scan Not Satisfied
0
7
FIGURE 5-17. ST2 Result Phase Register Bitmap
This bit is set to 1 when the FDC transfers the last byte
of the last sector without the TC signal becoming active.
The last sector is the End of Track sector number pro-
grammed in the command phase.
0: The FDC did not transfer the last byte of the last
1: The FDC transferred the last byte of the last sector
If the FDC cannot find the address mark of a data field
or of an address field during a read, scan, or verify com-
mand, i.e., bit 0 of ST1 is 1, this bit indicates when and
where the failure occurred.
0: The FDC failed to detect an address mark for the
1: The FDC failed to detect an address mark for the
This bit indicates whether or not the FDC detected a bad
track
0: No bad track detected.
1: Bad track detected.
This bit indicates whether or not the value of the data
byte from the microprocessor meets any of the condi-
tions specified by the scan command used.
Section
the SCAN LOW OR EQUAL and the SCAN HIGH OR
EQUAL Commands" on page 128 and TABLE 5-21
"The Effect of Scan Commands on the ST2 Register" on
page 129 describe the conditions.
0: The data byte from the microprocessor meets at
1: The data byte from the microprocessor does not
0
6
Not Used
sector without the TC signal becoming active.
without the TC signal becoming active.
address field after two disk revolutions.
data field after it found the correct address field.
The desired sector is not found. If the track number
recorded on any sector on the track is FFh and this
number is different from the track address specified
in the command phase, then there is a hard error in
IBM format.
least one of the conditions specified.
meet any of the conditions specified.
Result Phase Status Register 2 (ST2)
Control Mark
0
5
CRC Error in Data Field
0
4
5.7.16
Wrong Track
0
3
Scan Equal Hit
0
2
0
Scan Not Satisfied
1
"The
0
Bad Track
0
Reset
Required
Missing Address
Mark Location
Result Phase Status
SCAN
Register 2 (ST2)
EQUAL,