LM3S102-IRN20 Luminary Micro, Inc., LM3S102-IRN20 Datasheet - Page 86
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LM3S102-IRN20
Manufacturer Part Number
LM3S102-IRN20
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S102-IRN20.pdf
(335 pages)
- Current page: 86 of 335
- Download datasheet (2Mb)
Internal Memory
7
7.1
Figure 7-1. Flash Block Diagram
7.2
7.2.1
86
SRAM Array
Cortex-M3
Bridge
Internal Memory
The LM3S102 microcontroller comes with 2 KB of bit-banded SRAM and 8 KB of flash memory.
The flash controller provides a user-friendly interface, making flash programming a simple task.
Flash protection can be applied to the flash memory on a 2-KB block basis.
Block Diagram
Functional Description
This section describes the functionality of both memories.
SRAM Memory
The internal SRAM of the Stellaris devices is located at address 0x20000000 of the device
memory map. To reduce the number of time consuming read-modify-write (RMW) operations,
ARM has introduced bit-banding technology in the new Cortex-M3 processor. With a
bit-band-enabled processor, certain regions in the memory map (SRAM and peripheral space) can
use address aliases to access individual bits in a single, atomic operation.
System Bus
DCode
ICode
APB
Preliminary
Flash Protection
Flash Control
Flash Timing
USECRL
FCMISC
FMPRE
FMPPE
FCRIS
FCIM
FMA
FMD
FMC
Flash Array
October 6, 2006
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