LM3S102-IRN20 Luminary Micro, Inc., LM3S102-IRN20 Datasheet - Page 167
![no-image](/images/no-image-200.jpg)
LM3S102-IRN20
Manufacturer Part Number
LM3S102-IRN20
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S102-IRN20.pdf
(335 pages)
- Current page: 167 of 335
- Download datasheet (2Mb)
October 6, 2006
Reset
Reset
Type
Type
Bit/Field
31:8
GPTM TimerB Prescale Match (GPTMTBPMR)
Offset 0x044
7:0
RO
RO
31
15
0
0
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044
This register effectively extends the range of GPTMTBMATCHR to 24 bits.
RO
RO
30
14
0
0
TBPSMR
reserved
Name
RO
RO
29
13
0
0
reserved
RO
RO
28
12
0
0
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM TimerB Prescale Match
This value is used alongside GPTMTBMATCHR to detect timer
match events while using a prescaler.
RO
RO
24
0
8
0
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
TBPSMR
R/W
RO
19
0
3
0
LM3S102 Data Sheet
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
167
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