LM3S102-IRN20 Luminary Micro, Inc., LM3S102-IRN20 Datasheet - Page 11
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LM3S102-IRN20
Manufacturer Part Number
LM3S102-IRN20
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S102-IRN20.pdf
(335 pages)
- Current page: 11 of 335
- Download datasheet (2Mb)
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Register 30:
General-Purpose Timers .............................................................................................................. 138
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Register 5:
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Register 9:
Register 10:
Register 11:
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Register 13:
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Register 16:
Register 17:
Register 18:
Watchdog Timer............................................................................................................................ 170
Register 1:
Register 2:
October 6, 2006
GPIO Interrupt Event (GPIOIEV), offset 0x40C....................................................................... 112
GPIO Interrupt Mask (GPIOIM), offset 0x410.......................................................................... 113
GPIO Raw Interrupt Status (GPIORIS), offset 0x414.............................................................. 114
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ........................................................ 115
GPIO Interrupt Clear (GPIOICR), offset 0x41C....................................................................... 116
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ................................................. 117
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500.............................................................. 118
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504.............................................................. 119
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508.............................................................. 120
GPIO Open Drain Select (GPIOODR), offset 0x50C............................................................... 121
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ...................................................................... 122
GPIO Pull-Down Select (GPIOPDR), offset 0x514.................................................................. 123
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518...................................................... 124
GPIO Digital Input Enable (GPIODEN), offset 0x51C ............................................................. 125
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ........................................... 126
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ........................................... 127
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ........................................... 128
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC........................................... 129
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ........................................... 130
GPIO Peripheral Identification 1(GPIOPeriphID1), offset 0xFE4 ............................................ 131
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ........................................... 132
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC........................................... 133
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .............................................. 134
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .............................................. 135
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .............................................. 136
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC.............................................. 137
GPTM Configuration (GPTMCFG), offset 0x000..................................................................... 150
GPTM TimerA Mode (GPTMTAMR), offset 0x004 .................................................................. 151
GPTM TimerB Mode (GPTMTBMR), offset 0x008 .................................................................. 152
GPTM Control (GPTMCTL), offset 0x00C............................................................................... 153
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .................................................................... 155
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C .......................................................... 157
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ..................................................... 158
GPTM Interrupt Clear (GPTMICR), offset 0x024..................................................................... 159
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ...................................................... 160
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C...................................................... 161
GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ....................................................... 162
GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 ....................................................... 163
GPTM TimerA Prescale (GPTMTAPR), offset 0x038.............................................................. 164
GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ............................................................. 165
GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040................................................ 166
GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044................................................ 167
GPTM TimerA (GPTMTAR), offset 0x048 ............................................................................... 168
GPTM TimerB (GPTMTBR), offset 0x04C .............................................................................. 169
Watchdog Load (WDTLOAD), offset 0x000 ............................................................................ 173
Watchdog Value (WDTVALUE), offset 0x004 ......................................................................... 174
Preliminary
LM3S102 Data Sheet
11
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