LM3S102-IRN20 Luminary Micro, Inc., LM3S102-IRN20 Datasheet - Page 321

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LM3S102-IRN20

Manufacturer Part Number
LM3S102-IRN20
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Table 18-10. I
a. Values depend on the value programmed into the TPR bit in the I
b. Because I2CSCL and I2CSDA are open-drain-type outputs, which the controller can only actively drive Low, the
c. Specified at a nominal 50 pF load.
Figure 18-2. I
October 6, 2006
Parameter
TPR programmed for the maximum I2CSCL frequency (TPR=0x2) results in a minimum output timing as shown in the table
above. The I
The actual position is affected by the value programmed into the TPR; however, the numbers given in the above values are
minimum values.
time I2CSCL or I2CSDA takes to reach a high level depends on external signal capacitance and pull-up resistor
values.
No.
I8
I9
a
a
I2CSDA
I2CSCL
2
C interface is designed to scale the actual data transition time to move it to the middle of the I2CSCL Low period.
2
2
Parameter
C Timing
C Characteristics (Continued)
t
SCSR
t
SCS
I1
Parameter Name
Start condition setup time (for repeated
start condition only)
Stop condition setup time
I2
I4
Preliminary
2
C Master Timer Period (I2CMTPR) register (see page 282); a
I6
I7
Min
36
24
Nom
-
-
I5
I8
LM3S102 Data Sheet
I3
Max
-
-
system
system
clocks
clocks
Unit
321

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