LM3S102-IRN20 Luminary Micro, Inc., LM3S102-IRN20 Datasheet - Page 209
![no-image](/images/no-image-200.jpg)
LM3S102-IRN20
Manufacturer Part Number
LM3S102-IRN20
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S102-IRN20.pdf
(335 pages)
- Current page: 209 of 335
- Download datasheet (2Mb)
October 6, 2006
Bit/Field
2
1
0
Name
EPS
PEN
BRK
Type
R/W
R/W
R/W
Reset
0
0
0
Preliminary
Description
UART Even Parity Select
If this bit is set to 1, even parity generation and checking is
performed during transmission and reception, which checks for
an even number of 1s in data and parity bits.
When cleared to 0, then odd parity is performed, which checks
for an odd number of 1s.
This bit has no effect when parity is disabled by the PEN bit.
UART Parity Enable
If this bit is set to 1, parity checking and generation is enabled;
otherwise, parity is disabled and no parity bit is added to the data
frame.
UART Send Break
If this bit is set to 1, a Low level is continually output on the UnTX
output, after completing transmission of the current character.
For the proper execution of the break command, the software
must set this bit for at least two frames (character periods). For
normal use, this bit must be cleared to 0.
LM3S102 Data Sheet
209
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