LM3S102-IRN20 Luminary Micro, Inc., LM3S102-IRN20 Datasheet - Page 136
![no-image](/images/no-image-200.jpg)
LM3S102-IRN20
Manufacturer Part Number
LM3S102-IRN20
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S102-IRN20.pdf
(335 pages)
- Current page: 136 of 335
- Download datasheet (2Mb)
General-Purpose Input/Outputs (GPIOs)
136
Reset
Type
Reset
Type
Bit/Field
31:8
GPIO Primecell Identification 2 (GPIOPCellID2)
Offset 0xFF8
7:0
RO
RO
31
15
0
0
Register 29: GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8
The GPIOPCellID0, GPIOPCellID1, GPIOPCellID2, and GPIOPCellID3 registers are four 8-bit
wide registers, that can conceptually be treated as one 32-bit register. The register is used as a
standard cross-peripheral identification system.
RO
RO
30
14
0
0
reserved
Name
CID2
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0x05
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPIO PrimeCell ID Register[23:16]
Provides software a standard cross-peripheral identification
system.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
CID2
RO
RO
19
0
3
0
RO
RO
18
0
2
1
October 6, 2006
RO
RO
17
0
1
0
RO
RO
16
0
0
1
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