LM3S102-IRN20 Luminary Micro, Inc., LM3S102-IRN20 Datasheet - Page 66
![no-image](/images/no-image-200.jpg)
LM3S102-IRN20
Manufacturer Part Number
LM3S102-IRN20
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S102-IRN20.pdf
(335 pages)
- Current page: 66 of 335
- Download datasheet (2Mb)
System Control
66
Reset
Reset
Type
Type
Bit/Field
31:4
Software Reset Control 0 (SRCR0)
Offset 0x040
2:0
3
RO
RO
31
15
0
0
Register 10: Software Reset Control 0 (SRCR0), offset 0x040
Writes to this register are masked by the bits in the Device Capabilities 1 (DC1) register (see
page 60).
RO
RO
30
14
0
0
reserved
reserved
Name
WDT
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
R/W
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
reserved
Reset
RO
RO
25
0
9
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
Reset control for the Watchdog unit.
Reserved bits return an indeterminate value, and should
never be changed.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
R/W
RO
20
0
4
0
WDT
R/W
RO
19
0
3
0
RO
RO
18
0
2
0
October 6, 2006
reserved
RO
RO
17
0
1
0
RO
RO
16
0
0
0
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