MT90883 Zarlink Semiconductor, MT90883 Datasheet - Page 65

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MT90883

Manufacturer Part Number
MT90883
Description
(MT90880 - MT90883) TDM to Packet Processors
Manufacturer
Zarlink Semiconductor
Datasheet
demanding applications, the MT9088x can connect to up to four external memory devices, with a total capacity
of up to 8 Mbytes.
Connecting to a single external memory devices
The diagram in Figure 28 shows how to connect the MT90880 up to a single PBSRAM device. The example
chosen is a Micron
MHz system clock, used as the master clock to the MT90880 and the memory system.
The memory is permanently chip enabled, with all chip enable signals (CE#, CE2# and CE2) tied to an active
state. Read and write access is controlled by the MT90880 outputs RAM_OE[0]# and RAM_WE[0]#. The
MT90880 only performs 32 bit wide accesses to memory, therefore the memory's individual byte write signals
(BWa# to BWd#) are tied low. Write access to the full 32-bit word is controlled via the global write enable signal,
GW#.
Connection to a ZBT
Syncburst's GW#, and tying the control pins LBO# and CKE# low.
MT9088x device
Figure 28 - Connecting the MT90880 to a Single External Memory Device
TM
®
MT58L256L32P, an 8 Mbit "Syncburst
device, such as the MT55L256L32P, is very similar, substituting the R/W# pin for the
RAM_D[23:16]
RAM_D[31:24]
RAM_ADSC#
RAM_WE[0]#
RAM_D[15:8]
RAM_A[19:4]
RAM_OE[0]#
RAM_D[7:0]
RAM_A[3]
RAM_A[2]
S_CLK
Zarlink Semiconductor Inc.
MT90880/1/2/3
66 MHz
System Clock
65
TM
" family SRAM. The clock to the memory is the 66
Micron
CLK
SA
SA1
SA0
ADSC#
GW#
OE#
DQa
DQb
DQc
DQd
(256K x 32 bits Syncburst
e.g. MT58L256L32P
TM
generic SRAM
ADSP#
MODE
BWE#
BWa#
BWb#
BWd#
BWc#
ADV#
CE2#
CE2
CE#
TM
ZZ
)
Data Sheet
V
V
DD
SS

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