XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 89

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
6.3.2 Port A Data Direction Register
6.3.3 Port B Data Register
M68HC12B Family — Rev. 8.0
MOTOROLA
Expanded wide and peripheral:
Alternate functions:
Expanded narrow:
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
This register determines the primary direction for each port A pin when functioning
as a general-purpose I/O port. DDRA is not in the on-chip map in expanded and
peripheral modes.
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
Bits PB7–PB0 are associated with addresses ADDR7–ADDR0 and
DATA7–DATA0. When port B is not used for external addresses and data such as
in single-chip mode, these pins can be used as general-purpose I/O. DDRB
determines the primary direction of each pin. This register is not in the on-chip map
in expanded and peripheral modes.
Address: $0002
Address: $0001
Reset:
Reset:
Read:
Write:
Read:
Write:
1 = Associated pin is an output.
0 = Associated pin is a high-impedance input.
Figure 6-3. Port B Data Register (PORTB)
ADDR7
ADDR7
DATA7
DDA7
Bit 7
Bit 7
PB7
0
Figure 6-2. Port A Data Direction Register (DDRA)
Bus Control and Input/Output (I/O)
ADDR6
ADDR6
DATA6
DDA6
PB6
6
0
6
ADDR5
ADDR5
DATA5
DDA5
PB5
5
0
5
ADDR4
ADDR4
DATA4
Unaffected by reset
DDA4
PB4
4
0
4
ADDR3
ADDR3
DATA3
DDA3
PB3
3
0
3
Bus Control and Input/Output (I/O)
ADDR2
ADDR2
DATA2
DDA2
PB2
2
0
2
ADDR1
ADDR1
DATA1
DDA1
PB1
1
0
1
Data Sheet
Registers
ADDR0
ADDR0
DATA0
DDA0
Bit 0
Bit 0
PB0
0
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