XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 164
XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
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Standard Timer Module (TIM)
12.3.14 Timer Test Register
12.3.15 Timer Port Data Register
Data Sheet
164
NOTE:
Read: Anytime
Write: Only in special mode (SMODN = 0)
TCBYP — Timer Divider Chain Bypass Bit
PCBYP — Pulse Accumulator Divider Chain Bypass Bit
Read: Anytime; inputs return pin level; outputs return pin driver input level
Write: Data stored in an internal latch; drives pins only if configured for output
Writes do not change pin state when the pin is configured for timer output. The
minimum pulse width for pulse accumulator input should always be greater than
two module clocks due to input synchronizer circuitry. The minimum pulse width for
the input capture should always be greater than the width of two module clocks due
to input synchronizer circuitry.
Address: $00AD
Address: $00AE
Reset:
Reset:
Timer:
Read:
Read:
Write:
Write:
0 = Normal operation
1 = 16-bit free-running timer counter is divided into two 8-bit halves and the
0 = Normal operation
1 = 16-bit pulse accumulator counter is divided into two 8-bit halves and the
PA:
prescaler is bypassed. The clock drives both halves directly.
prescaler is bypassed. The clock drives both halves directly.
I/OC7
Bit 7
Bit 7
PT7
PAI
0
0
0
Figure 12-28. Timer Port Data Register (PORTT)
Standard Timer Module (TIM)
Figure 12-27. Timer Test Register (TIMTST)
= Unimplemented
I/OC6
PT6
6
0
0
6
0
I/OC5
PT5
5
0
0
5
0
I/OC4
PT4
4
0
0
4
0
I/OC3
PT3
3
0
0
3
0
M68HC12B Family — Rev. 8.0
I/OC2
PT2
2
0
0
2
0
TCBYP
I/OC1
PT1
1
0
1
0
MOTOROLA
PCBYP
I/OC0
Bit 0
Bit 0
PT0
0
0
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