XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 260

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
Byte Data Link Communications (BDLC)
15.9.6 Port DLC Control Register
Data Sheet
260
Address: $00FD
Read: Anytime
Write: Anytime
The BDLC port DLC functions as a general-purpose I/O port. BDLC functions takes
precedence over the general-purpose port when enabled.
BDLCEN — BDLC Enable Bit
Reset:
Read:
Write:
1 = Configure I/O pins for BDLC function. BDLC is active.
0 = Configure BDLC I/O pins as general-purpose I/O. BDLC is off.
Bit 7
0
0
Figure 15-18. Port DLC Control Register (DLCSCR)
Byte Data Link Communications (BDLC)
Table 15-5. Offset Bit Values and Transceiver Delay
= Unimplemented
6
0
0
BO3–BO0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
5
0
0
4
0
0
Expected Delay (µs)
3
0
0
BDLCEN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
9
M68HC12B Family — Rev. 8.0
2
0
PUPDLC
1
0
MOTOROLA
RDPDLC
Bit 0
0

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