LPC3130 Philips Semiconductors (Acquired by NXP), LPC3130 Datasheet - Page 30

• Manufacturer Part Number: LPC3130
• Manufacturer: Philips Semiconductors (Acquired by NXP)

NXP Semiconductors
LPC3130_3131_0
Preliminary data sheet
6.26.1 Pin connections
6.25 I
6.26 LCD/NAND flash/SDRAM multiplexing
The LPC3130/3131 contains two I
This module has the following features:
The LPC3130/3131 contains a rich set of specialized hardware interfaces but the TFBGA
package does not contain enough pins to allow use of all signals of all interfaces
simultaneously. Therefore a pin-multiplexing scheme is created, which allows the
selection of the right interface for the application.
Pin multiplexing is enabled between the following interfaces:
The pin interface multiplexing is subdivided into five categories: storage, video, audio,
NAND flash, and UART related pin multiplexing. Each category supports several modes,
which can be selected by programming the corresponding registers in the SysCReg.
Table 9.
Pin Name
mLCD_CSB
mLCD_DB_1
mLCD_DB_0
2
•
•
•
•
•
•
•
•
•
•
•
C-bus master/slave interface
I
This interface supports functions described in the I
to 400 kHz. This includes multi-master operation and allows powering off this device
in a working system while leaving the I
I
with a single-master I
Standard I/Os also do not support multi-master I
Supports normal mode (100 kHz SCL).
Fast mode (400 kHz SCL with 24 MHz APB clock; 325 kHz with12 MHz APB clock;
175 kHz with 6 MHz APB clock).
Interrupt support.
Supports DMA transfers (single).
Four modes of operation:
– Master transmitter
– Master receiver
– Slave transmitter
– Slave receiver
between the dedicated LCD interface and the external bus interface.
between the NAND flash controller and the memory card interface.
between UART and SPI.
between I2STX_0 output and the PCM interface.
2
2
C0 interface: I
C1 interface: The I
Signals to pins for the pin interface multiplexing
Default Signal
LCD_CSB
LCD_DB_1
LCD_DB_0
Rev. 0.08 — 25 September 2008
2
C0 is a standard I
2
2
C1-bus interface uses standard I/O pins and is intended for use
C-bus and does not support powering off of this device.
2
C master/slave interfaces.
Alternate Signal
EBI_NSTCS_0
EBI_NSTCS_1
EBI_CLKOUT
2
C-compliant bus interface with open-drain pins.
2
C-bus functional.
2
C implementations.
2
C-bus specification for speeds up
Description
Video related pin multiplexing.
Video related pin multiplexing.
Video related pin multiplexing.
LPC3130/3131
© NXP B.V. 2008. All rights reserved.
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