LPC3130 Philips Semiconductors (Acquired by NXP), LPC3130 Datasheet - Page 26

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LPC3130

Manufacturer Part Number
LPC3130
Description
Manufacturer
Philips Semiconductors (Acquired by NXP)
Datasheet

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NXP Semiconductors
LPC3130_3131_0
Preliminary data sheet
6.17 IO configuration
6.18 10-bit Analog-to-Digital Converter (ADC)
interface provided in the Input/Output configuration module (IOCONF). Next to several
dedicated GPIO pins, most digital IO pins can also be used as GPIO if they are not
required for their normal, dedicated function.
This module has the following features:
This module is a 10-bit successive approximation Analog-to-Digital Converter (ADC10B)
with an input multiplexer to allow for multiple analog signals on its input. A common use of
this module is to read out multiple keys on one input from a resistor network.
This module has the following features:
The General Purpose Input/Output (GPIO) pins can be controlled through the register
Fig 8. Block diagram of the Watchdog Timer
Provides control for the digital pins that can double as GPIO (next to their normal
function). The pinning list in
Each pin controlled by the IOCONFIG can be configured for four operational modes:
– Normal operation (i.e. controlled by a function block).
– Driven low.
– Driven high.
– High impedance/input.
The GPIO pins can be observed (read) in any mode.
The register interface provides set and clear access methods for choosing the
operational mode.
Four analog input channels, selected by an analog multiplexer.
Programmable ADC resolution from 2 bit to 10 bit.
The maximum conversion rate is 400 k samples/s for 10 bit resolution and
1500 k samples/s for 2 bit resolution.
Single A/D conversion scan mode and continuous A/D conversion scan mode.
Power-down mode.
APB
Rev. 0.08 — 25 September 2008
WDT
m1
m0
Table 4
EVENT ROUTER
indicates which pins can double as GPIO.
CGU
reset
CONTROLLER
LPC3130/3131
INTERRUPT
002aae086
© NXP B.V. 2008. All rights reserved.
nFRQ
nIRQ
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