AD9510 Analog Devices, AD9510 Datasheet - Page 32

• Manufacturer Part Number: AD9510
• Manufacturer: Analog Devices

Reg.
Addr.
(Hex)
09
0A
0A
0A
0A
0A
0B
0C
0D
0D
0D
AD9510
Bit(s)
<7>
<1:0>
<4:2>
<5>
<6>
<7>
<5:0>
<7:0>
<1:0>
<4:2>
<5>
Name
PLL Power-Down
Prescaler Value
P/P+1
B Counter Bypass
14-Bit Reference
Counter, MSBs
14-Bit Reference
Counter, R LSBs
Antibacklash Pulse-
Width
Digital Lock Detect
Window
Description
Default = 000.
These currents assume: CP_RSET = 5.1 kΩ.
Actual current can be calculated by: CP_lsb = 3.1875/CP_RSET.
Reserved or not used.
01 = asynchronous power-down (default).
<1>
0
0
1
1
<4>
0
0
0
0
1
1
1
1
DM = Dual Modulus, FD = Fixed Divide.
Reserved or not used.
Only valid when operating the prescaler in fixed divide (FD) mode. When this bit is set, the B
counter is divide-by-1. This allows the prescaler setting to determine the divide for the N
divider.
Reserved or not used.
R divider (MSB) <13:8>.
R divider (MSB) <7:0>.
<1>
0
0
1
1
Reserved or not used.
<5>
0 (Default) 9.5
1
<3>
0
0
1
1
0
0
1
1
Digital Lock Detect Window
(ns)
3.5
Rev. PrA | Page 32 of 41
<2>
0
1
0
1
0
1
0
1
Mode
FD
FD
DM
DM
DM
DM
DM
FD
<0>
0
1
0
1
<0>
0
1
0
1
Digital Lock Detect Loss of Lock Threshold (ns)
15
7
Prescaler Mode
Divide-by-1
Divide-by-2
2/3
4/5
8/9
16/17
32/33
Divide-by-3
Preliminary Technical Data
Antibacklash Pulse-Width (ns)
1.3 (Default)
2.9
6.0
1.3
Mode
Normal Operation
Asynchronous Power-Down
Normal Operation
Synchronous Power-Down