AD9510 Analog Devices, AD9510 Datasheet - Page 2

• Manufacturer Part Number: AD9510
• Manufacturer: Analog Devices

AD9510
TABLE OF CONTENTS
Specifications..................................................................................... 3
Timing Diagrams............................................................................ 13
Absolute Maximum Ratings.......................................................... 14
Pin Configuration and Function Descriptions........................... 15
Terminology .................................................................................... 17
Typical Performance Characteristics ........................................... 18
Typical Modes of Operation ......................................................... 19
Function Description ..................................................................... 21
PLL Characteristics ...................................................................... 3
Clock Inputs .................................................................................. 4
Clock Outputs ............................................................................... 5
Timing Characteristics ................................................................ 5
Clock Output Phase Noise .......................................................... 7
Clock Output Additive Time Jitter........................................... 10
PLL and Distribution Phase Noise and Spurious................... 10
Serial Control Port ..................................................................... 11
Function Pin................................................................................ 11
Status Pin ..................................................................................... 12
Power............................................................................................ 12
Thermal Characteristics ............................................................ 14
ESD Caution................................................................................ 14
Overall.......................................................................................... 21
PLL Operation ............................................................................ 21
PLL Reference Input................................................................... 21
PLL Reference Divider............................................................... 21
VCO/VCXO Clock Input .......................................................... 21
Rev. PrA | Page 2 of 41
Serial Control Port ......................................................................... 24
Register Map and Description ...................................................... 27
Applications..................................................................................... 38
Outline Dimensions ....................................................................... 41
REVISION HISTORY
11/04—Revision PrA: Preliminary Version
VCO/VCXO Feedback Divider ................................................ 21
A and B Counters ....................................................................... 22
Setting Values for P, A, B, and R ................................................ 22
Phase Frequency Detector (PFD) and Charge Pump............ 23
Status Pin ..................................................................................... 23
CLK1 Clock Input ...................................................................... 23
Serial Control Port Pin Descriptions....................................... 24
General Operation of Serial Control Port............................... 24
The Instruction Word (16 Bits) ................................................ 25
MSB/LSB First Transfers ........................................................... 25
Summary Table........................................................................... 27
Register Map Description ......................................................... 30
Using the AD9510 Outputs for ADC Clock Applications .... 38
CMOS Clock Distribution ........................................................ 38
LVPECL Clock Distribution ..................................................... 39
LVDS Clock Distribution .......................................................... 40
Power and Grounding Considerations, and Power Supply
Rejection...................................................................................... 40
Ordering Guide .......................................................................... 41
Preliminary Technical Data