SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 319

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SAM3SD8B

Manufacturer Part Number
SAM3SD8B
Description
Manufacturer
Atmel Corporation
Datasheets
Table 19-1.
19.3.2
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Signal Name
PGMNOE
PGMNVALID
PGMM[3:0]
PGMD[15:0]
Signal Names
Signal Description List (Continued)
Function
Output Enable (active high)
0: DATA[15:0] is in input mode
1: DATA[15:0] is in output mode
Specifies DATA type (See
Bi-directional data bus
Depending on the MODE settings, DATA is latched in different internal registers.
Table 19-2.
When MODE is equal to CMDE, then a new command (strobed on DATA[15:0] signals) is stored
in the command register.
Table 19-3.
MODE[3:0]
0000
0001
0010
0011
0100
0101
Default
DATA[15:0]
0x0011
0x0012
0x0022
0x0032
0x0042
0x0013
0x0014
0x0024
0x0015
0x0034
0x0044
0x0025
0x0054
Mode Coding
Command Bit Coding
Symbol
CMDE
ADDR0
ADDR1
ADDR2
ADDR3
DATA
IDLE
Table
Symbol
READ
WP
WPL
EWP
EWPL
EA
SLB
CLB
GLB
SGPB
CGPB
GGPB
SSE
19-2)
Input/Output
Output
Type
Input
Input
Data
Command Register
Address Register LSBs
Address Register MSBs
Data Register
No register
Command Executed
Read Flash
Write Page Flash
Write Page and Lock Flash
Erase Page and Write Page
Erase Page and Write Page then Lock
Erase All
Set Lock Bit
Clear Lock Bit
Get Lock Bit
Set General Purpose NVM bit
Clear General Purpose NVM bit
Get General Purpose NVM bit
Set Security Bit
Active
Level
Low
Low
Comments
Pulled-up input at reset
Pulled-up input at reset
Pulled-up input at reset
Pulled-up input at reset
SAM3S8/SD8
SAM3S8/SD8
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