SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 1077

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SAM3SD8B

Manufacturer Part Number
SAM3SD8B
Description
Manufacturer
Atmel Corporation
Datasheets
40.3.2.2
40.3.3
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Active Mode Power Consumption
Wait Mode
Figure 40-7.
Table 40-10
Table 40-10. Typical Current Consumption in Wait Mode
The Active Mode configuration and measurements are defined as follows:
• VDDIO = VDDIN = 3.3V for VDDCORE = 1.8V. VDDOUT not used for VDDCORE = 1.62V
• VDDCORE = 1.8V (Internal Voltage regulator used) and 1.62V (external supply)
• T
• CoreMark Algorithm running from Flash Memory or SRAM
• All Peripheral clocks are deactivated.
• Master Clock (MCK) running at various frequencies with PLL or the fast RC oscillator
• Current measurement on AMP1 (VDDCORE) and AMP2 for Total consumption
• Core Clock and Master Clock Stopped
• Current measurement as shown in the above figure
• All Peripheral clocks deactivated
A
There is no activity on the I/Os of the device.
= 25° C
See
Figure 40-7 on page 1077
gives current consumption in typical conditions.
Measurement Setup for Wait Mode
3.3V
Conditions
@25°C
AMP2
AMP1
VDDOUT
VDDIN
Consumption
VDDOUT
(AMP1)
12.3
VDDCORE
VDDIO
VDDPLL
Consumption
SAM3S8/SD8
SAM3S8/SD8
Regulator
(AMP2)
Voltage
Total
20
Unit
µA
1077
1077

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