SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 243

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

C.1.2
ARM DDI 0165B
TAP state machine
Scan chain 1
Scan chain 1 is used for debugging the ARM9E-S core when it has entered debug state.
You can use it to:
•
•
•
Scan chain 2
Scan chain 2 allows access to the EmbeddedICE-RT registers. Refer to Test data
registers on page C-10 for details.
The process of serial test and debug is best explained in conjunction with the JTAG state
machine. Figure C-2 on page C-4 shows the state transitions that occur in the TAP
controller. The state numbers shown in the diagram are output from the ARM9E-S on
the DBGTAPSM[3:0] bits.
inject instructions into the ARM pipeline
read and write its registers
perform memory accesses.
Copyright © 2000 ARM Limited. All rights reserved.
Debug in depth
C-3