SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 136

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

ARM9E-S Coprocessor Interface
6.11.2
6-20
Connecting multiple coprocessors
The RDATA enable term (asel) is specially constructed to select the coprocessor output
data during
to the ARM9E-S RDATA and WDATA buses while still allowing tracing of
STC
If you have multiple coprocessors in your system, connect the handshake signals as
shown in Table 6-2.
You must also multiplex the output data from the coprocessors.
The handshaking arrangement for a two-coprocessor system is shown in Example 6-1.
Example 6-1
In the case of two coprocessors that have handshaking signals CHSD1, and CHSE1,
and CHSD2, and CHSE2, respectively, the following connections are made:
ARM9E-S
CHSD[1]<= CHSD1[1] ANDCHSD2[1]
CHSD[0]<= CHSD1[0] OR CHSD2[0]
CHSE[1]<= CHSE1[1] ANDCHSE2[1]
CHSE[0]<= CHSE1[0] OR CHSE2[0]
Signal
PASS, LATECANCEL
CHSD, CHSE
data.
Note
Copyright © 2000 ARM Limited. All rights reserved.
MRC
and
CP1
STC
operations. This is to allow the connection of the ETM module
Connection
Connect these signals to all coprocessors present in the system.
Combine the individual bit 1 of CHSD, and CHSE by ANDing.
Combine the individual bit 0 of CHSD, and CHSE by ORing.
Connect the CHSD, and CHSE inputs to the ARM9E-S.
CP2
Table 6-2 Handshake signal connections
ARM DDI 0165B
MRC
and