ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 80

• Manufacturer Part Number: ATUC64L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC64L4U

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32002F–03/2010
Table 8-7.
lddsp
st.b
st.b{cond4}
st.d
st.h
st.h{cond4}
st.w
st.w{cond4}
stcond
stdsp
sthh.w
stswp.h
stswp.w
Load and store instructions
C
C
C
C
E
E
E
C
C
C
E
E
C
C
C
E
E
E
C
C
C
E
E
E
E
C
E
E
E
E
Rd, SP[disp]
Rp++, Rs
--Rp, Rs
Rp[disp], Rs
Rp[disp], Rs
Rb[Ri<<sa], Rs
Rp[disp], Rs
Rp++, Rs
--Rp, Rs
Rp, Rs
Rp[disp], Rs
Rb[Ri<<sa], Rs
Rp++, Rs
--Rp, Rs
Rp[disp], Rs
Rp[disp], Rs
Rb[Ri<<sa], Rs
Rp[disp], Rs
Rp++, Rs
--Rp, Rs
Rp[disp], Rs
Rp[disp], Rs
Rb[Ri<<sa], Rs
Rp[disp], Rs
Rp[disp], Rs
SP[disp], Rs
Rp[disp<<2], Rx,
Ry
Rb[Ri<<sa], Rx,
Ry
Rp[disp], Rs
Store with pre-decrement.
Store byte with displacement.
Indexed Store byte.
Store byte with displacement if condition
satisfied. CPU revision 2 and higher only.
Store with pre-decrement.
Store doubleword.
Store double with displacement.
Indexed Store double.
Store with pre-decrement.
Store halfword with displacement.
Store halfword with displacement if condition
satisfied. CPU revision 2 and higher only.
Store with pre-decrement.
Store word with displacement.
Store word with displacement if condition
satisfied. CPU revision 2 and higher only.
Conditional store with displacement.
Store with displacement from SP.
Combine halfwords to word and store with
displacement
Combine halfwords to word and store indexed
Swap bytes and store halfword with
displacement.
Swap bytes and store word with displacement.
Load with displacement from SP.
Store with post-increment.
Store with post-increment.
Store with post-increment.
Indexed Store halfword.
Store with post-increment.
Indexed Store word.
AVR32
1
2
1
1
1
1
1
1
1
2
1
2
2
2
3
1
1
1
2
1
1
1
1
2
1
2/3
1
2
2
1
80