ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 131

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ATUC64L4U

Manufacturer Part Number
ATUC64L4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATUC64L4U

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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9.5.4.8
9.5.5
9.6
9.6.1
32002F–03/2010
Data Trace
Registers
Overview
Program Trace Correlation
Program Trace Correlation messages are used to correlate events to the program flow that may
not be associated with the instruction stream (e.g. Data Trace Messages). The occurrence of an
event listed in Table 9-41 will cause this message to be transmitted.
Table 9-41.
Table 9-42.
Program trace is enabled using the TM field in the Development Control register.
The AVR32 OCD system provides data trace via the AUX port. The CPU data memory accesses
can be monitored real-time using the Nexus class 2+ compliant Data Trace Unit. Both reads and
writes can be traced.
Data Trace information is transmitted through data trace messages, which can be of read or
write type, with or without sync. The messages contain information about the data address and
value which triggered the trace. Data addresses can be complete (with sync), or compressed
relative to the previous transmitted message (without sync). The value contains the data value
read or written from the data cache, and is of the same width as the access size (byte, halfword,
word, or doubleword).
The TM[1] bit in the Development Control register must be set to enable data trace. It is also
possible to trigger data trace using watchpoints. In this case, TM[1] will be set or cleared
automatically.
Program Trace Correlation
Size (bits)
8
4
6
Event Code
(EVCODE)
0b0000
0b0001
0b0010 - 0b0011
0b0100
0b0101 - 0b1111
Packet
Program Trace Correlation message
Event Code (EVCODE) description
Packet
Name
I-CNT
EVCODE
TCODE
Event Description
Entry into Debug Mode
Entry into Low Power Mode
Reserved
Program Trace Disabled
Reserved
Packet
Type
Variable
Fixed
Fixed
Direction: From target
Description
Number of instruction units executed since the last taken
branch.
Event Code. Refer to Table 9-42.
Value = 33
AVR32
131

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