ATtiny26 Atmel Corporation, ATtiny26 Datasheet - Page 53

• Manufacturer Part Number: ATtiny26
• Manufacturer: Atmel Corporation

Specifications of ATtiny26

• Flash (kbytes): 2 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 11
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

ATtiny26(L)
PCINT0: Pin Change Interrupt 0 pin. Pin change interrupt is enabled on pin when global interrupt
is enabled, pin change interrupt is enabled and the alternate functions do not mask the interrupt.
The masking alternate function is the output compare match output OC1B. Digital input is
enabled on pin PB3 also in SLEEP modes, if the pin change interrupt is enabled and not masked
by the alternate functions.
• SCK/SCL/OC1B/PCINT0 – Port B, Bit 2
SCK: Clock input or output in USI Three-wire mode. When the SPI is enabled this pin is config-
ured as an input. In the USI Three-wire mode the bit DDRB2 controls the direction of the pin,
output for the Master mode and input for the Slave mode.
SCL: USI External Open-collector Serial Clock for USI Two-wire mode. The SCL pin is pulled
low when PORTB2 is cleared (zero) or USI start condition is detected and DDRB2 is set (one).
Pull-up is disabled in USI Two-wire mode.
OC1B: Inverted Timer/Counter1 PWM Output B: The PB2 pin can serve as an inverted output
for the Timer/Counter1 PWM mode if USI is not enabled. The PB2 pin has to be configured as
an output (DDB2 set (one)) to serve this function.
PCINT1: Pin Change Interrupt 0 pin. Pin change interrupt is enabled on pin when global interrupt
is enabled, pin change interrupt is enabled and the alternate functions do not mask the interrupt.
The masking alternate function are the inverted output compare match output OC1B and USI
clocks SCK/SCL. Digital input is enabled on pin PB2 also in SLEEP modes, if the pin change
interrupt is enabled and not masked by the alternate functions.
• DO/OC1A/PCINT0 – Port B, Bit 1
DO: Data Output in USI Three-wire mode. Data output (DO) overrides PORTB1 value and it is
driven to the port when the data direction bit DDB1 is set (one). However the PORTB1 bit still
controls the pullup, enabling pullup if direction is input and PORTB1 is set(one).
OC1A: Output Compare match output: The PB1 pin can serve as an output for the
Timer/Counter1 compare match A. The PB1 pin has to be configured as an output (DDB1 set
(one)) to serve this function. The OC1B pin is also the output pin for the PWM mode timer func-
tion if not used in programming or USI.
PCINT0: Pin Change Interrupt 0 pin. Pin change interrupt is enabled on pin when global interrupt
is enabled, pin change interrupt is enabled and the alternate functions do not mask the interrupt.
The masking alternate functions are the output compare match output OC1A and Data Output
(DO) in USI Three-wire mode. Digital input is enabled on pin PB1 also in SLEEP modes, if the
pin change interrupt is enabled and not masked by the alternate functions.
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