ATtiny26 Atmel Corporation, ATtiny26 Datasheet - Page 30

• Manufacturer Part Number: ATtiny26
• Manufacturer: Atmel Corporation

Specifications of ATtiny26

• Flash (kbytes): 2 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 11
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

External Clock
30
ATtiny26(L)
EEPROM and Flash access. If EEPROM or Flash is written, do not calibrate to more than 10%
above the nominal frequency. Otherwise, the EEPROM or Flash write may fail. Note that the
oscillator is intended for calibration to 1.0, 2.0, 4.0, or 8.0 MHz. Tuning to other values is not
guaranteed, as indicated in Table 13.
Table 13. Internal RC Oscillator Frequency Range.
To drive the device from an external clock source, XTAL1 should be driven as shown in Figure
24. To run the device on an external clock, the CKSEL Fuses must be programmed to “0000”
and PLLCK to “1”. By programming the CKOPT Fuse, the user can enable an internal 36 pF
capacitor between XTAL1 and GND.
Figure 24. External Clock Drive Configuration
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table 14.
Table 14. Start-up Times for the External Clock Selection
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behaviour. It is required to ensure that the
MCU is kept in reset during such changes in the clock frequency.
OSCCAL Value
SUT1..0
00
01
10
11
$00
$7F
$FF
Start-up Time from
Power-down
Min Frequency in Percentage of
6 CK
6 CK
6 CK
Nominal Frequency
EXTERNAL
SIGNAL
CLOCK
100%
50%
75%
Additional Delay from
Reset (V
Reserved
4.1 ms
65 ms
CC
–
= 5.0V)
PB5 (XTAL2)
XTAL1
GND
Max Frequency in Percentage of
Nominal Frequency
Recommended Usage
BOD enabled
Fast rising power
Slowly rising power
100%
150%
200%
1477K–AVR–08/10