ATtiny26 Atmel Corporation, ATtiny26 Datasheet - Page 9

• Manufacturer Part Number: ATtiny26
• Manufacturer: Atmel Corporation

Specifications of ATtiny26

• Flash (kbytes): 2 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 11
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

X-register, Y-register,
and Z-register
ALU – Arithmetic
Logic Unit
1477K–AVR–08/10
All of the register operating instructions in the instruction set have direct and single cycle access
to all registers. The only exceptions are the five constant arithmetic and logic instructions SBCI,
SUBI, CPI, ANDI, and ORI between a constant and a register, and the LDI instruction for load
immediate constant data. These instructions apply to the second half of the registers in the Reg-
ister File – R16..R31. The general SBC, SUB, CP, AND, and OR, and all other operations
between two registers or on a single register apply to the entire Register File.
As shown in Figure 3, each register is also assigned a data memory address, mapping them
directly into the first 32 locations of the user Data Space. Although not being physically imple-
mented as SRAM locations, this memory organization provides flexibility in access of the
registers, as the X-, Y-, and Z-registers can be set to index any register in the file.
The registers R26..R31 have some added functions to their general purpose usage. These reg-
isters are address pointers for indirect addressing of the Data Space. The three indirect address
registers X, Y, and Z are defined as:
Figure 4. X-, Y-, and Z-register
In the different addressing modes, these address registers have functions as fixed displace-
ment, automatic increment and decrement (see the descriptions for the different instructions).
The high-performance AVR ALU operates in direct connection with all 32 general purpose work-
ing registers. Within a single clock cycle, ALU operations between registers in the Register File
are executed. The ALU operations are divided into three main categories – Arithmetic, Logical,
and Bit-functions.
X-register
Y-register
Z-register
15
7
R29 ($1D)
15
7
R27 ($1B)
15
7
R31 ($1F)
0
0
0
7
R28 ($1C)
7
R26 ($1A)
7
R30 ($1E)
0
0
0
0
0
0
9