ATtiny26 Atmel Corporation, ATtiny26 Datasheet - Page 31

• Manufacturer Part Number: ATtiny26
• Manufacturer: Atmel Corporation

Specifications of ATtiny26

• Flash (kbytes): 2 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 11
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

High Frequency
PLL Clock –
PLL
1477K–AVR–08/10
CLK
There is an internal PLL that provides nominally 64 MHz clock rate locked to the RC Oscillator
for the use of the Peripheral Timer/Counter1 and for the system clock source. When selected as
a system clock source, by programming (“0”) the fuse PLLCK, it is divided by four. When this
option is used, the CKSEL3..0 must be set to “0001”. This clocking option can be used only
when operating between 4.5 - 5.5V to guaratee safe operation. The system clock frequency will
be 16 MHz (64 MHz/4). When using this clock option, start-up times are determined by the SUT
Fuses as shown in Table 15. See also “PCK Clocking System” on page 24.
Table 15. Start-up Times for the PLLCK
SUT1..0
00
01
10
11
Start-up Time from
Power-down
16K CK
1K CK
1K CK
1K CK
Additional Delay from
Reset (V
4.1 ms
65 ms
CC
–
–
= 5.0V)
Recommended Usage
BOD enabled
Fast rising power
Slowly rising power
Slowly rising power
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