NOIL1SN3000A-GDC ON Semiconductor, NOIL1SN3000A-GDC Datasheet - Page 9

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NOIL1SN3000A-GDC

Manufacturer Part Number
NOIL1SN3000A-GDC
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of NOIL1SN3000A-GDC

Lead Free Status / Rohs Status
Supplier Unconfirmed
6T Pixel Architecture
global shutter combined with a high sensitivity and good
parasitic light sensitivity (PLS). This pixel architecture is
designed in an 8 mm x 8 mm pixel pitch and designed with a
large fill factor to meet the electro-optical specifications as
shown in Table 2 on page 3.
LUPA3000 6T pixels at V
Figure 9. Electro−optical Response of LUPA3000 Pixel
The pixel architecture shown in Figure 8 features the
Figure 9 displays the electro-optical response of the
reset
Figure 8. Pixel Schematic
precharge
sample
DD
= 2.5 V.
2.5 - 3.3V
Vmem
Figure 7. Column Multiplexing Scheme
Row sel.
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Analog Front End
Programmable Gain Amplifiers(PGA)
ADCs) to maximize sensor array signal levels to the ADC
dynamic range. Six gain settings are available through the
SPI register interface to allow 1x, 1.5x, 2x, 2.25x, 3x, or 4x
gain.
the LUPA3000 chip is shown in Figure 10.
programmable gain level. They also convert the single
ended pixel voltage from each column (as referenced to the
user programmable black or dark reference level) to a
unipolar differential signal for the PGA stages. This is
followed by a conversion to a bipolar differential signal to
maximize the ADC dynamic range and noise immunity.
LUPA3000 includes analog PGA (before each of the 64
The entire AFE signal processing and ADC concept for
The analog signal processing frontend circuits provide

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