NOIL1SN3000A-GDC ON Semiconductor, NOIL1SN3000A-GDC Datasheet - Page 19

• Manufacturer Part Number: NOIL1SN3000A-GDC
• Manufacturer: ON Semiconductor

Specifications of NOIL1SN3000A-GDC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 15. DETAILED DESCRIPTION OF SPI REGISTERS
Address
100
32
33
34
35
36
64
65
66
67
68
69
70
71
72
73
74
96
97
98
99
<7:0>
<7:0>
<7:0>
<7:0>
<7:0>
<6:0>
<2:0>
<6:4>
<7:0>
<3:0>
<7:4>
<7:0>
<7:0>
<7:0>
<7:0>
<1:0>
<7:0>
<3:0>
<2:0>
<7:0>
<7:0>
<7:0>
<7:0>
<7:0>
<7:0>
Bits
<3>
<0>
<1>
<2>
<3>
<4>
<5>
<6>
<7>
<0>
<1>
<2>
<3>
<4>
<5>
<6>
<7>
SOF
SOL
EOL
IDLE_A
IDLE_B
Voltage reference adjust
bg_trim
vref_trim
Clock edge delay
dly_sen
dly_seq
pwd_chan<7:0>
pwd_chan<15:8>
pwd_chan<23:16>
pwd_chan<31:24>
pwd_chan<33:32>
Misc1 SuperBlk controls
crc_en
crc_sync_en
pwd_ena
pwd_glob
test_en
atst_en
sblk_spare1
sblk_spare2
LVDS Trim
pgagn
Misc2 SuperBlk Controls
bg_disable
int_res
pwd_bg
pwd_vdark
pwd_vref
pwd_vcm
sblk_spare3
sblk_spare4
Testpattern 0
Testpattern 1
Testpattern 2
Testpattern 3
Testpattern 4
Name
http://onsemi.com
19
Start of frame keyword
Start of line keyword
End of line keyword
Idle_A keyword
Idle_B keyword
Bandgap voltage adjust
Unused reads 0
Voltage reference adjust
clk/4 edge placement for sequencer
clk/8 edge placement for sequencer
Channel 0-7 power down
Channel 8-15 power down
Channel 16-23 power down
Channel 24-31 power down
Channel clkout and sync power down
Enable CRC for data channels
Enable CRC for sync channel
Enable channel power down
Global power down (all 32 channels)
Serial LVDS test enable
Analog ADC test enable
Spare
Spare
LVDS output drive adjust
Programmable analog gain
Disable on-chip bandgap
Internal and external resistor select
Power down bandgap
Power down dark reference driver
Power down voltage references
Power down common mode voltage
Spare
Spare
Test pattern for channel 0
Test pattern for channel 1
Test pattern for channel 2
Test pattern for channel 3
Test pattern for channel 4
Description