NOIL1SN3000A-GDC ON Semiconductor, NOIL1SN3000A-GDC Datasheet - Page 38

• Manufacturer Part Number: NOIL1SN3000A-GDC
• Manufacturer: ON Semiconductor

Specifications of NOIL1SN3000A-GDC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Data Stream
control channels. Data channel “i” outputs the data from
column “i” of every kernel. All control words in Table 49 can
be uploaded through the SPI.
Figure 29. This misplaced EOL word is ignored. The CRC
is valid during transmission of the test image.
Pixel Clock
Frame Overhead Time
registers. Typical values are:
•
•
•
•
(51.5 Mhz)
Table 49. CONTROL WORDS TRANSMITTED OVER SYNC CHANNEL
Figure 29 represents the data stream of the data and
A SOF word is followed by an EOL word, as shown in
The FOT is controlled by the PRECHARGE_TIMER, SAMPLE_TIMER, VMEM_TIMER, and FOT_TIMER SPI
PRECHARGE_TIMER: 1.5 ms
SAMPLE_TIMER: 2.5 ms
VMEM_TIMER: 2.7 ms
FOT_TIMER: 3.2 ms
Sync
Data
Keyword
a<15:8>
a<7:0>
SOF
SOL
EOL
Ia
Ib
Ix
precharge
pixel reset
sample
vmem
EA(lx)
EA(lx)
data
EA(lx)
SOF
Idle word A
Idle word B
Idle word A or idle word B
Start of frame
Start of line
End of line
Address of line being readout, a<15> is the MSB
Address of line being readout
EA(lx)
EOL
EA(lx)
EA(lx)
SAMPLE_TIMER
Figure 29. Timing of Data Stream
EA(lx)
SOL
VMEM_TIMER
PRECHARGE_TIMER
Figure 30. FOT Timing
<15:8>
invalid data
Col i
LN
Description
http://onsemi.com
FOT_TIMER
<7:0>
Col
i+32
LN
38
EA(lx)
Col
i+64
Normal Readout Mode
coming from the ADCs. The sync channel operates as
described in the section Readout of Test Image on page 37.
The data stream shown in Figure 29 is still valid.
sampled in the pixel is stable and ready for readout.
FOT_TIMER
VMEM_TIMER. The rising edge of pixel_reset coincides
with the rising edge of pixel_vmem.
In normal readout mode, the data channels transmit data
FOT_TIMER provides the moment when the signal
EOL
Col x
EA(lx)
CRC
ROT
arrives
EA(lx)
EA(lx)
EA(lx)
SOL
typically
valid data
<15:8>
Col i
LN
<7:0>
LN
Col
i+32
500
ns
after