NOIL1SN3000A-GDC ON Semiconductor, NOIL1SN3000A-GDC Datasheet - Page 18

• Manufacturer Part Number: NOIL1SN3000A-GDC
• Manufacturer: ON Semiconductor

Specifications of NOIL1SN3000A-GDC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Sequencer and Logic
core based on the SPI settings uploaded. You can control the
following settings:
•
•
•
•
Table 15. DETAILED DESCRIPTION OF SPI REGISTERS
The sequencer generates the internal timing of the image
Window resolution
FOT and ROT
Enabling or disabling reduced ROT mode
Readout modes (training, test image, and normal
Address
10
11
12
13
14
15
16
17
30
31
0
1
2
3
4
5
6
7
8
9
<5:0>
<5:4>
<4:0>
<7:0>
<7:0>
<7:0>
<7:0>
<5:0>
<7:0>
<2:0>
<7:0>
<2:0>
<4:0>
<1:0>
<7:0>
<6:0>
<7:0>
<3:0>
<7:4>
<7:0>
<3:0>
<7:4>
<7:0>
<3:0>
<7:4>
<7:0>
<7:0>
Bits
<0>
<1>
<2>
<3>
<0>
<1>
<2>
SEQUENCER
Power down
Reset_n_seq
Red_rot
Ds_en
Sel_pre_width
ROT_TIMER
PRECHARGE_TIMER
SAMPLE_TIMER
VMEM_TIMER
FOT_TIMER
NB_OF_KERNELS
Y_START <7:0>
Y_START <10:8>
Y_END <7:0>
Y_END <10:8>
X_START
TRAINING
Training_en
Bypass_en
Analog_out_en
BLACK_REF
BIAS_COL_LOAD
BIASING_CORE_1
Bias_col_amp
Bias_col_outputamp
BIASING_CORE_2
Bias_sel_pre
Bias_analog_out
BIASING_CORE_3
Bias_decoder_y
Bias_decoder_x
FIXED
CHIP_REV_NB
Name
)
http://onsemi.com
18
Power down analog core
Reset_n of on chip sequencer
Enable reduced ROT mode
Enable DS operation
Width of sel_pre pulse
Length of ROT
Length of pixel precharge in clk/4
Length of pixel sample in clk/4
Length of pixel vmem in clk/4
Length of FOT in clk/4
Number of kernels to readout
Start pointer Y readout
End pointer Y readout
Start pointer X
1: Transmit training pattern; 0: transmit test patterns
1: Evaluate TRAINING_EN bit; 0: ignore TRAINING_EN bit,
captured image readout.
Enable analog output
ADC black reference
Biasing of column load
Biasing of image core
Biasing of first column amplifier
Biasing of the output column amplifier
Biasing of image core
Biasing for column precharge structure
Biasing for analog output amplifier
Biasing of image core
Biasing of y decoder
Biasing of x decoder
Fixed, read only register
Chip revision number
Description