NOIL1SN3000A-GDC ON Semiconductor, NOIL1SN3000A-GDC Datasheet - Page 8

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NOIL1SN3000A-GDC

Manufacturer Part Number
NOIL1SN3000A-GDC
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of NOIL1SN3000A-GDC

Lead Free Status / Rohs Status
Supplier Unconfirmed
Image Sensor Core
sensor consists of the pixel array, column amplifiers, analog
front end (AFE) consisting of programmable gain amplifier
and ADCs, data block (not shown), sequencer, and LVDS
transmitter and receivers. The image sensor of 1696 x 1710
active pixels is read out in progressive scan.
x-direction in steps of 32 pixels, and in the y-direction in
The LUPA3000 floor plan is shown in Figure 6. The
The architecture enables programmable addressing in the
32
Pixel (0,0)
Odd kernels
32
Even kernels
Pixel kernels 32 x 1
SENSOR ARCHITECTURE
Figure 6. Sensor Floor Plan
32 +2 LVDS drivers
Column amplifiers
http://onsemi.com
On chip drivers
X-shift register
64 ADC's
1696 * 1710
Pixel array
8
steps of one line. The starting point of the address can be
uploaded by the SPI.
when the data is multiplexed and prepared for the LVDS
interface.
NOTE: In Figure 7 on page 9, 32 pixels (1 kernel) are
The AFE prepares the signal for the digital data block
read out, where the most significant bit (MSB) is
the first bit out.

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