NOIL1SN3000A-GDC ON Semiconductor, NOIL1SN3000A-GDC Datasheet - Page 26

• Manufacturer Part Number: NOIL1SN3000A-GDC
• Manufacturer: ON Semiconductor

Specifications of NOIL1SN3000A-GDC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Sensor Clock Edge Adjust Register (b1000001 / d65)
programmable delay between the column readout and the
ADC capture clock edges. The relationship is programmed
to align to ±7 edges of the input high-speed clock (input lvds
The
sensor
D LY_ S EN = 0000
DLY _ SE Q =
clock
DATA_OUT
ADC _ O U T
SER_LOAD
CLK_SER
CLK_CRC
CLK_ADC
CRC_OUT
CLK_SEN
CLK_SEQ
edge
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
0001
0111
1111
adjust
1 0
Figure 15. LUPA3000 Internal Clocking
7 6 5 4 3 2 1 0
register
DA TA (N + 1 )
http://onsemi.com
allows
26
clock or CLK_SER). Figure 15 shows this relationship
between the input clock and all the derived on-chip clocks.
Some examples of programmed delay values for both
CLK_SEN and CLK_SEQ are also shown.
7 6 5 4 3 2 1 0
DAT A( N )
DAT A (N +1 )
7 6 5 4 3 2
DATA(N−1)
DA TA (N + 1 )
DAT A( N )