NOIL1SN3000A-GDC ON Semiconductor, NOIL1SN3000A-GDC Datasheet - Page 27

• Manufacturer Part Number: NOIL1SN3000A-GDC
• Manufacturer: ON Semiconductor

Specifications of NOIL1SN3000A-GDC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

dly_sen, bits <3:0>
clock (CLK_SEN, clk/4) position, with respect to the high
speed input clock (clk) and the falling edge of the ADC
sample clock (ADC_CLK, clk/8).
Table 40. DLY_SEN BITS
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
On startup
These bits allow adjusting the rising edge of the sensor
Value
Rising edge of CLK_SEN coincident with
falling edge of CLK_ADC
CLK_SEN is +1 clk edge after falling edge of
CLK_ADC
+2
+3
+4
+5
+6
+7
Same as code 0000
CLK_SEN is –1 clk edge before falling edge of
CLK_ADC same as 0111
–2 same as 0110
–3 same as 1010
–4 same as 0100
–5 same as 0011
–6 same as 0010
–7 same as 0001
0000
Effect
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dly_seq, bits <7:4>
odd/even select (CLK_SEQ, clk/8) position, with respect to
the high speed input clock (clk) and the falling edge of the
ADC sample clock (ADC_CLK, clk/8).
Table 41. DLY_SEQ BITS
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
On startup
These bits allow adjusting the falling edge of the sensor
Value
Falling edge of CLK_SEQ coincident with
falling edge of CLK_ADC
CLK_SEQ is +1 clk edge after falling edge of
CLK_ADC
+2
+3
+4
+5
+6
+7
Same as code 0000
CLK_SEQ is –1 clk edge before falling edge of
CLK_ADC
–2
–3
–4
–5
–6
–7
1100
Effect