MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 79

• Manufacturer Part Number: MC68HC908LD60IFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908LD60IFU

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 6MHz
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 6-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

MC68HC908LD60
Freescale Semiconductor
BCS rel
BEQ rel
BGE opr
BGT opr
BHCC rel
BHCS rel
BHI rel
BHS rel
BIH rel
BIL rel
BIT #opr
BIT opr
BIT opr
BIT opr,X
BIT opr,X
BIT ,X
BIT opr,SP
BIT opr,SP
BLE opr
BLO rel
BLS rel
BLT opr
BMC rel
BMI rel
BMS rel
BNE rel
BPL rel
BRA rel
Source
Form
Branch if Carry Bit Set (Same as BLO)
Branch if Equal
Branch if Greater Than or Equal To
(Signed Operands)
Branch if Greater Than (Signed
Operands)
Branch if Half Carry Bit Clear
Branch if Half Carry Bit Set
Branch if Higher
Branch if Higher or Same
(Same as BCC)
Branch if IRQ Pin High
Branch if IRQ Pin Low
Bit Test
Branch if Less Than or Equal To
(Signed Operands)
Branch if Lower (Same as BCS)
Branch if Lower or Same
Branch if Less Than (Signed Operands)
Branch if Interrupt Mask Clear
Branch if Minus
Branch if Interrupt Mask Set
Branch if Not Equal
Branch if Plus
Branch Always
—
Rev. 1.1
Operation
Table 6-1. Instruction Set Summary (Continued)
Central Processor Unit (CPU)
PC ← (PC) + 2 + rel ? (Z) | (N ⊕ V) =
PC ← (PC) + 2 + rel ? (Z) | (N ⊕ V) =
PC ← (PC) + 2 + rel ? (C) | (Z) = 0
PC ← (PC) + 2 + rel ? (C) | (Z) = 1
PC ← (PC) + 2 + rel ? (N ⊕ V) = 0
PC ← (PC) + 2 + rel ? (N ⊕ V) =1
PC ← (PC) + 2 + rel ? IRQ = 1
PC ← (PC) + 2 + rel ? IRQ = 0
PC ← (PC) + 2 + rel ? (C) = 1
PC ← (PC) + 2 + rel ? (H) = 0
PC ← (PC) + 2 + rel ? (H) = 1
PC ← (PC) + 2 + rel ? (C) = 0
PC ← (PC) + 2 + rel ? (C) = 1
PC ← (PC) + 2 + rel ? (N) = 1
PC ← (PC) + 2 + rel ? (N) = 0
PC ← (PC) + 2 + rel ? (Z) = 1
PC ← (PC) + 2 + rel ? (Z) = 0
PC ← (PC) + 2 + rel ? (I) = 0
PC ← (PC) + 2 + rel ? (I) = 1
PC ← (PC) + 2 + rel
Description
(A) & (M)
0
1
V H I N Z C
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
0 – –
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
Effect on
CCR
Central Processor Unit (CPU)
–
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
Technical Data
9EE5
9ED5
C5
D5
2C
2D
25
27
90
92
28
29
22
24
2F
2E
A5
B5
E5
F5
93
25
23
91
2B
26
2A
20
Opcode Map
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