MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 10

• Manufacturer Part Number: MC68HC908LD60IFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908LD60IFU

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 6MHz
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 6-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

Table of Contents
Technical Data
10
8.6
8.6.1
8.6.2
8.6.3
8.6.4
8.7
8.8
8.8.1
8.8.2
8.9
9.1
9.2
9.3
9.3.1
9.3.2
9.3.3
9.4
9.4.1
9.4.2
9.4.2.1
9.4.2.2
9.4.2.3
9.4.2.4
9.4.2.5
9.5
9.5.1
9.5.2
9.5.3
9.6
9.6.1
9.6.1.1
CGM I/O Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
CGM During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . 106
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
SIM Bus Clock Control and Generation . . . . . . . . . . . . . . . . . 111
Reset and System Initialization. . . . . . . . . . . . . . . . . . . . . . . . 112
SIM Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Exception Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117
Section 9. System Integration Module (SIM)
PLL Control Register (PCTL) . . . . . . . . . . . . . . . . . . . . . . . . 99
PLL Bandwidth Control Register (PBWC) . . . . . . . . . . . . . 100
PLL Programming Register (PPG) . . . . . . . . . . . . . . . . . . . 102
H & V Sync Output Control Register (HVOCR) . . . . . . . . . 104
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .106
Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Clock Start-Up from POR . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Clocks in Stop Mode and Wait Mode . . . . . . . . . . . . . . . . . 111
External Pin Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Active Resets from Internal Sources . . . . . . . . . . . . . . . . . 113
SIM Counter During Power-On Reset . . . . . . . . . . . . . . . . 116
SIM Counter During Stop Mode Recovery . . . . . . . . . . . . . 116
SIM Counter and Reset States. . . . . . . . . . . . . . . . . . . . . . 117
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .114
Computer Operating Properly (COP) Reset. . . . . . . . . . 115
Low-Voltage Inhibit Reset . . . . . . . . . . . . . . . . . . . . . . .115
Illegal Opcode Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . .116
Table of Contents
MC68HC908LD60
Freescale Semiconductor
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Rev. 1.1