MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 112

• Manufacturer Part Number: MC68HC908LD60IFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908LD60IFU

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 6MHz
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 6-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

System Integration Module (SIM)
9.4 Reset and System Initialization
9.4.1 External Pin Reset
Technical Data
112
In wait mode, the CPU clocks are inactive. The SIM also produces two
sets of clocks for other modules. Refer to the wait mode subsection of
each module to see if the module is active or inactive in wait mode.
Some modules can be programmed to be active in wait mode.
The MCU has the following reset sources:
All of these resets produce the vector $FFFE–FFFF ($FEFE–FEFF in
monitor mode) and assert the internal reset signal (IRST). IRST causes
all registers to be returned to their default values and all modules to be
returned to their reset states.
An internal reset clears the SIM counter
external reset does not. Each of the resets sets a corresponding bit in
the SIM reset status register (SRSR)
Pulling the asynchronous RST pin low halts all processing. The PIN bit
of the SIM reset status register (SRSR) is set as long as RST is held low
for a minimum of 67 OSCXCLK cycles, assuming that the POR was not
the source of the reset
shows the relative timing.
•
•
•
•
•
•
Reset Type
All others
Power-on reset module (POR)
External reset pin (RST)
Computer operating properly module (COP)
Low-voltage inhibit (LVI)
Illegal opcode
Illegal address
POR
System Integration Module (SIM)
Table 9-2. PIN Bit Set Timing
(see Table 9-2. PIN Bit Set
Number of Cycles Required to Set PIN
4163 (4096 + 64 + 3)
(see 9.8 SIM
67 (64 + 3)
(see 9.5 SIM
MC68HC908LD60
Freescale Semiconductor
Timing).
Registers).
Counter), but an
Figure 9-4
—
Rev. 1.1