MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 68

• Manufacturer Part Number: MC68HC908LD60IFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908LD60IFU

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 6MHz
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 6-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

Configuration Register (CONFIG)
5.4 Configuration Register
Technical Data
68
NOTE:
Address:
Reset:
SSREC — Short Stop Recovery Bit
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal oscillator, do not set the SSREC bit.
COPRS — COP Rate Select Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
Read:
Write:
SSREC enables the CPU to exit stop mode with a delay of 32
OSCXCLK cycles instead of a 4096 OSCXCLK cycle delay.
COPRS selects the COP timeout period. Reset clears COPRS. (See
Section 20. Computer Operating Properly
STOP enables the STOP instruction.
COPD disables the COP module. (See
Operating Properly
1 = Stop mode recovery after 32 OSCXCLK cycles
0 = Stop mode recovery after 4096 OSCXCLK cycles
1 = COP timeout period = 2
0 = COP timeout period = 2
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
$001F
Bit 7
0
0
Configuration Register (CONFIG)
Figure 5-1. Configuration Register (CONFIG)
= Unimplemented
6
0
0
(COP).)
5
0
0
13
18
4
0
0
– 2
– 2
4
4
SSREC
OSCXCLK cycles
OSCXCLK cycles
3
0
Section 20. Computer
MC68HC908LD60
COPRS
(COP).)
Freescale Semiconductor
2
0
STOP
1
0
—
Rev. 1.1
COPD
Bit 0
0