MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 22

• Manufacturer Part Number: MC68HC908LD60IFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908LD60IFU

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 6MHz
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 6-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

List of Figures
Technical Data
22
Figure
8-5
8-6
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
9-9
9-10 Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
9-11 Interrupt Recognition Example . . . . . . . . . . . . . . . . . . . . . . . . 120
9-12 Interrupt Status Register 1 (INT1). . . . . . . . . . . . . . . . . . . . . . 123
9-13 Interrupt Status Register 2 (INT2). . . . . . . . . . . . . . . . . . . . . . 123
9-14 Wait Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
9-15 Wait Recovery from Interrupt or Break . . . . . . . . . . . . . . . . . . 126
9-16 Wait Recovery from Internal Reset. . . . . . . . . . . . . . . . . . . . . 126
9-17 Stop Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
9-18 Stop Mode Recovery from Interrupt or Break . . . . . . . . . . . . . 127
9-19 SIM Break Status Register (SBSR) . . . . . . . . . . . . . . . . . . . . 128
9-20 SIM Reset Status Register (SRSR) . . . . . . . . . . . . . . . . . . . . 129
9-21 SIM Break Flag Control Register (SBFCR) . . . . . . . . . . . . . . 130
10-1 Monitor Mode Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
10-2 Monitor Data Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
10-3 Sample Monitor Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 137
10-4 Read Transaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137
10-5 Break Transaction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .138
11-1 TIM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
11-2 PWM Period and Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . 150
11-3 TIM Status and Control Register (TSC) . . . . . . . . . . . . . . . . . 155
11-4 TIM Counter Registers (TCNTH:TCNTL) . . . . . . . . . . . . . . . . 157
11-5 TIM Counter Modulo Registers (TMODH:TMODL). . . . . . . . . 158
PLL Programming Register (PPG) . . . . . . . . . . . . . . . . . . . . . 102
H&V Sync Output Control Register (HVOCR) . . . . . . . . . . . . 104
SIM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
SIM I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . . .110
OSC Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
External Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113
Internal Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Sources of Internal Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
POR Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Interrupt Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Interrupt Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
List of Figures
Title
MC68HC908LD60
Freescale Semiconductor
—
Rev. 1.1
Page