MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 181

• Manufacturer Part Number: MC68HC908LD60IFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908LD60IFU

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 6MHz
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 6-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

14.1 Contents
14.2 Introduction
MC68HC908LD60
Freescale Semiconductor
Technical Data — MC68HC908LD60
—
Rev. 1.1
Section 14. Multi-Master IIC Interface (MMIIC)
14.2
14.3
14.4
14.5
14.5.1
14.5.2
14.5.3
14.5.4
14.5.5
14.5.6
14.6
This Multi-master IIC (MMIIC) Interface is designed for internal serial
communication between the MCU and other IIC devices. A hardware
circuit generates "start" and "stop" signal, while byte by byte data
transfer is interrupt driven by the software algorithm. Therefore, it can
greatly help the software in dealing with other devices to have higher
system efficiency in a typical digital monitor system.
This module not only can be applied in internal communications, but can
also be used as a typical command reception serial bus for factory setup
and alignment purposes. It also provides the flexibility of hooking
additional devices to an existing system for future expansion without
adding extra hardware.
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
Multi-Master IIC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
Programming Considerations . . . . . . . . . . . . . . . . . . . . . . . . . 192
I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
Multi-Master IIC Address Register (MMADR) . . . . . . . . . . 184
Multi-Master IIC Control Register (MMCR) . . . . . . . . . . . . 185
Multi-Master IIC Master Control Register (MIMCR) . . . . . . 186
Multi-Master IIC Status Register (MMSR) . . . . . . . . . . . . . 188
Multi-Master IIC Data Transmit Register (MMDTR) . . . . . . 190
Multi-Master IIC Data Receive Register (MMDRR) . . . . . . 191
Multi-Master IIC Interface (MMIIC)
Technical Data
181