HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 4

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HSDC-JAKIT1W2/DB

Manufacturer Part Number
HSDC-JAKIT1W2/DB
Description
DAC/ADC LATTICE KIT
Manufacturer
NXP Semiconductors
Series
-r

Specifications of HSDC-JAKIT1W2/DB

Main Purpose
Interface, ADC/DAC for Lattice ECP3 FPGA
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
ADC1413D, DAC1408D, ECP3 FPGA
Primary Attributes
Loop Back Demo with 2 High Speed Converters
Secondary Attributes
USB Powered
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6898
NXP Semiconductors
6. Pinning information
ADC1413D_SER
Product data sheet
6.1 Pinning
6.2 Pin description
Table 2.
Symbol
INAP
INAM
VCMA
REFAT
REFAB
AGND
CLKP
CLKM
AGND
REFBB
REFBT
VCMB
INBM
Fig 2.
Pinning diagram
Pin description
All information provided in this document is subject to legal disclaimers.
REFBB
REFAB
REFBT
REFAT
AGND
AGND
VCMB
VCMA
CLKM
CLKP
INAM
INBM
INAP
INBP
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
Rev. 5 — 9 February 2011
10
12
13
14
11
1
2
3
4
5
6
7
8
9
I
I
G
I
I
G
I
Type
O
O
O
O
O
O
[1]
Transparent top view
ADC1413D
Description
channel A analog input
channel A complementary analog input
channel A output common voltage
channel A top reference
channel A bottom reference
analog ground
clock input
complementary clock input
analog ground
channel B bottom reference
channel B top reference
channel B output common voltage
channel B complementary analog input
Dual 14-bit ADC; serial JESD204A interface
ADC1413D series
42
41
40
39
38
37
36
35
34
33
32
31
30
29
005aaa068
DGND
DGND
VDDD
CMLPA
CMLNA
VDDD
DGND
DGND
VDDD
CMLNB
CMLPB
VDDD
DGND
DGND
© NXP B.V. 2011. All rights reserved.
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