HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 17

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HSDC-JAKIT1W2/DB

Manufacturer Part Number
HSDC-JAKIT1W2/DB
Description
DAC/ADC LATTICE KIT
Manufacturer
NXP Semiconductors
Series
-r

Specifications of HSDC-JAKIT1W2/DB

Main Purpose
Interface, ADC/DAC for Lattice ECP3 FPGA
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
ADC1413D, DAC1408D, ECP3 FPGA
Primary Attributes
Loop Back Demo with 2 High Speed Converters
Secondary Attributes
USB Powered
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6898
NXP Semiconductors
ADC1413D_SER
Product data sheet
If bit INTREF_EN is set to logic 0, the reference voltage is determined either internally or
externally as detailed in
Table 10.
Figure 11
required reference voltage source.
Mode
Internal
Internal
External
Internal, SPI mode
(Figure
Fig 10. Reference equivalent schematic
SENSE
VREF
14)
(Figure
(Figure
(Figure
to
Reference modes
Figure 14
11)
12)
13)
All information provided in this document is subject to legal disclaimers.
BUFFER
SELECTION
SPI bit, “Internal
reference”
0
0
0
1
LOGIC
Rev. 5 — 9 February 2011
illustrate how to connect the SENSE and VREF pins to select the
Table
10.
REFERENCE
AMP
EXT_ref
EXT_ref
SENSE pin
GND
VREF pin = SENSE pin and
330 pF capacitor to GND
V
VREF pin = SENSE pin and
330 pF capacitor to GND
DDA
Dual 14-bit ADC; serial JESD204A interface
REFERENCE
BANDGAP
ADC1413D series
VREF pin
330 pF capacitor
to GND
external voltage
from 0.5 V to 1 V
ADC CORE
REFAB/
REFBB
REFAT/
REFBT
© NXP B.V. 2011. All rights reserved.
Full-scale
(V (p-p))
2
1
1 to 2
1 to 2
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