DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 239

• Manufacturer Part Number: DS33R11+
• Description: IC ETH TXRX T1/E1/J1 256-BGA
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS33R11+

• Protocol: T1/E1/J1
• Voltage - Supply: 1.8V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 6: Manual Error-Counter Update (MECU). When enabled by TR.ERCNT.4, the changing of this bit from a 0 to
a 1 allows the next clock cycle to load the error-counter registers with the latest counts and reset the counters. The
user must wait a minimum of 1.5 RCLKO clock periods before reading the error count registers to allow for proper
update.
Bit 5: Error-Counter Update Select (ECUS)
Bit 4: Error-Accumulation Mode Select (EAMS)
Bit 3: E1 Line-Code Violation Count Register Function Select (VCRFS)
Bit 2: PCVCR Fs-Bit Error-Report Enable (FSBE)
Bit 1: Multiframe Out-of-Sync Count Register Function Select (MOSCRF)
Bit 0: T1 Line-Code Violation Count Register Function Select (LCVCRF)
T1 Mode:
E1 Mode:
0 = update error counters once a second
1 = update error counters every 42ms (333 frames)
0 = update error counters once a second
1 = update error counters every 62.5ms (500 frames)
0 = TR.ERCNT.5 determines accumulation time
1 = TR.ERCNT.6 determines accumulation time
0 = count bipolar violations (BPVs)
1 = count code violations (CVs)
0 = do not report bit errors in Fs-bit position; only Ft-bit position
1 = report bit errors in Fs-bit position as well as Ft-bit position
0 = count errors in the framing bit position
1 = count the number of multiframes out-of-sync
0 = do not count excessive 0s
1 = count excessive 0s
—
7
0
TR.ERCNT
Error-Counter Configuration Register
41h
MECU
6
0
ECUS
5
0
239 of 344
EAMS
0
4
VCRFS
3
0
FSBE
2
0
MOSCRF
1
0
LCVCRF
0
0