DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 160

IC ETH TXRX T1/E1/J1 256-BGA

DS33R11+

Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R11+

Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: X86 Transmit Receive Control (TRSAPIL0-7) This is the address field for the X.86 transmitter and
expected value for the receiver. The register is reset to 0x01
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Committed Information Rate Enable (CIRE) Set this bit to 1 to enable the Committed Information Rate
Controller feature.
Bits 0 – 6: Committed Information Rate (CIR0-6) These bits provide the value for the committed information rate.
The value is multiplied by 500kbit/s to get the CIR value. The user must ensure that the CIR value is less than or
equal to the maximum Serial Interface transmit rate. The valid range is from 1 to 104. Any values outside this range
will result in unpredictable behavior. Note that a value of 104 translates to a 52Mbit/s line rate. Hence if the CIR is
above the line rate, the rate is not restricted by the CIR. For instance - if using a T1 line and the CIR is
programmed with a value of 104, it has no effect in restricting the rate.
TRSAPIL7
CIRE
7
0
7
0
TRSAPIL6
CIR6
6
0
6
0
LI.TRX86SAPIL
Transmit Receive X.86 SAPIL
0DCh
LI.CIR
Committed Information Rate
0DDh
TRSAPIL5
CIR5
5
0
5
0
TRSAPIL4
160 of 344
CIR4
0
0
4
4
TRSAPIL3
CIR3
3
0
3
0
TRSAPIL2
CIR2
2
0
2
0
TRSAPIL1
CIR1
1
0
1
0
TRSAPIL0
CIR0
0
1
0
1

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