DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 68

IC ETH TXRX T1/E1/J1 256-BGA

DS33R11+

Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R11+

Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver
9.19 X.86 Encoding and Decoding
X.86 protocol provides a method for encapsulating Ethernet Frame onto LAPS. LAPS provides HDLC type framing
structure for encapsulation of Ethernet frames. LAPS encapsulated frames can be used to send data onto a
SONET/SDH network. The DS33R11 expects a byte synchronization signal to provide the byte boundary for the
X.86 receiver. This is provided by the RBSYNC pin. The functional timing is shown in
Figure
12-4. The X.86
transmitter provides a byte boundary indicator with the signal TBSYNC. The functional timing is shown in
Figure
12-3. Note that in some cases, additional logic may be required to meet RSYNC/TSYNC sychronization
timing requirements when operating in X.86 mode.
Figure 9-12. LAPS Encoding of MAC Frames Concept
IEEE
802.3 MAC Frame
LAPS
Rate Adaption
SDH
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