DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 117
DS33R11+
Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet
1.DS33R11.pdf
(344 pages)
Specifications of DS33R11+
Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
- Current page: 117 of 344
- Download datasheet (12Mb)
11 DEVICE REGISTERS
Ten address lines are used to address the register space.
The addressable range for the device is 0000h to 08FFh. Each Register Section is 64 bytes deep. Global Registers
are preserved for software compatibility with multiport devices. The Serial Interface (Line) Registers are used to
configure the serial port and the associated transport protocol. The Ethernet Interface (Subscriber) registers are
used to control and observe each of the Ethernet ports. The registers associated with the MAC must be configured
through indirect register write /read access due to the architecture of the device.
When writing to a register input values for unused bits and registers (those designated with “-“) should be zero, as
these bits and registers are reserved. When a register is read from, the values of the unused bits and registers
should be ignored. A latched status bit is set when an event happens and is cleared when read. The register
details are provided in the following tables.
Table 11-1. Register Address Map
MAPPER/
Ethernet
T1/E1/J1
Mapper
Port 1
PORT
SELECT
CST=1
CST=0
CS=0,
CS=1,
CHIP
REGISTERS
GLOBAL
0000h–
003Fh
—
ARBITER
0040h–
007Fh
—
117 of 344
0080h–
00BFh
BERT
—
Table 11-1
INTERFAC
SERIAL
00C0h–
013Fh
—
E
shows the register map for the DS33R11.
0140h– 17Fh
INTERFACE
ETHERNET
—
TRANSCEIVER
000h–0FFh
T1/E1/J1
—
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