IDT82V2108PX8 IDT, Integrated Device Technology Inc, IDT82V2108PX8 Datasheet - Page 77

• Manufacturer Part Number: IDT82V2108PX8
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX8

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX8

IDT82V2108
Functional Description
TSCCKB
TSCFS
TSDn
TSDn
TSDn
TSCCKB
TSCFS
TSDn
The CHI (b3, E1-01CH) = 0 and the bit offset is 0:
The bit offset is set as: CHI (b3, E1-01CH) = 1, BOFF[2:0] (b2~0, E1-01CH) = 000; i.e. CER = 4:
For example: in Transmit Clock Slave mode, CMS (b2, E1-018H) = 0, DE (b4, E1-018H) = 0, FE (b3, E1-018H) = 0:
The CHI (b3, E1-01CH) = 0 and the bit offset is 0:
The bit offset is set as: CHI (b3, E1-01CH) = 1, BOFF[2:0] (b2~0, E1-01CH) = 000; i.e. CER = 6:
For example: in Transmit Clock Slave mode, CMS (b2, E1-018H) = 1, FE (b3, E1-018H) = 1, DE (b4, E1-018H) = 1:
1
1
2
2
1
3
1
3
TS31
2
4
2
TS31
Figure 50. Transmit Bit Offset in E1 Mode - 3
4
Figure 51. Transmit Bit Offset in E1 Mode - 4
3
5
3
5
TS31
TS31
4
6
4
6
5
7
5
7
starting edge
(CER=0)
6
8
6
starting edge
(CER=0)
8
7
1
7
1
8
8
67
2
1 2 3 CER=4
2
12345 CER=6
1
1
3
3
2
4
2
TS0
4
TS0
3
5
3
5
4
6
4
TS0
TS0
6
5
7
5
7
6
8
6
8
7
1
7
1
8
2
8
2
T1 / E1 / J1 OCTAL FRAMER
TS2
1
3
1
TS2
3
2
4
2
4
TS2
TS2
3
3
4
4
March 5, 2009