IDT82V2108PX8 IDT, Integrated Device Technology Inc, IDT82V2108PX8 Datasheet - Page 172

• Manufacturer Part Number: IDT82V2108PX8
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX8

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX8

FERE:
SMFERE:
CMFERE:
IDT82V2108
E1 FRMP Framing Status Interrupt Enable (032H, 0B2H, 132H, 1B2H, 232H, 2B2H, 332H, 3B2H)
C2NCIWE:
OOFE:
OOSMFE:
OOCMFE:
COFAE:
Programming Information
Bit Name
Default
Bit No.
Type
= 0: Disable the interrupt on the INT pin when there is error in the CRC Multi-Frame alignment pattern.
= 1: Enable the interrupt on the INT pin when there is error in the CRC Multi-Frame alignment pattern.
= 0: Disable the interrupt on the INT pin when the C2NCIWI (b7, E1-034H) is logic one.
= 1: Enable the interrupt on the INT pin when the C2NCIWI is logic one.
= 0: Disable the interrupt on the INT pin when the OOFI (b6, E1-034H) is logic one.
= 1: Enable the interrupt on the INT pin when the OOFI is logic one.
= 0: Disable the interrupt on the INT pin when the OOSMFI (b5, E1-034H) is logic one.
= 1: Enable the interrupt on the INT pin when the OOSMFI is logic one.
= 0: Disable the interrupt on the INT pin when the OOCMFI (b4, E1-034H) is logic one.
= 1: Enable the interrupt on the INT pin when the OOCMFI is logic one.
= 0: Disable the interrupt on the INT pin when the position of the Basic frame alignment signal changes.
= 1: Enable the interrupt on the INT pin when the position of the Basic frame alignment signal changes.
= 0: Disable the interrupt on the INT pin when there is error in the Basic frame alignment pattern.
= 1: Enable the interrupt on the INT pin when there is error in the Basic frame alignment pattern.
= 0: Disable the interrupt on the INT pin when there is an error in the Signaling Multi-Frame alignment pattern.
= 1: Enable the interrupt on the INT pin when there is an error in the Signaling Multi-Frame alignment pattern.
C2NCIWE
R/W
7
0
OOFE
R/W
6
0
OOSMFE
R/W
5
0
OOCMFE
R/W
4
0
162
COFAE
R/W
3
0
FERE
R/W
2
0
T1 / E1 / J1 OCTAL FRAMER
SMFERE
R/W
1
1
March 5, 2009
CMFERE
R/W
0
0