COM20022I3V-HT SMSC, COM20022I3V-HT Datasheet - Page 59

• Manufacturer Part Number: COM20022I3V-HT
• Description: IC CTRLR ARCNET 2KX8 RAM 48-TQFP
• Manufacturer: SMSC
• Series: ARCNETr

Specifications of COM20022I3V-HT

• Controller Type: ARCNET Controller
• Interface: Differential
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 65mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1004

10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
Datasheet
Chapter 8
SMSC COM20022I
nIOCS16
AD0-AD2,
D3-D15
nCS
ALE
nDS
DIR
Figure 8.1
*
Note 1:
Note 2: Read cycle for Address Pointer Low/High Registers occurring after an access
Note 2 is applied to an access to Data Register by DMA transfer.
T
T
T
T
t10
t11
t12
t13
t14
t15
t16
ARB
ARB
ARB
opr
t1
t2
t3
t4
t5
t6
t7
t8
t9
Timing Diagrams
is the period of operation clock. It depends on CKUP1 and CKUP0 bits
is the Arbitration Clock Period
is identical to T
is twice T
Previous Value
The Microcontroller typically accesses the COM20022 on every other cycle.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20022 cycles.
to Data Register requires a minimum of 5T
the leading edge of the next nDS.
- Multiplexed Bus, 68XX-Like Control Signals; Read Cycle
nCS Hold from ALE Low
ALE Low to nDS Low
nDS Low to Valid Data
nDS High to Data High Impedance
Cycle Time (nDS Low to Next Time Low)
DIR Setup to nDS Active
DIR Hold from nDS Inactive
ALE High Width
ALE Low Width
nDS Low Width
nDS High Width
nIOCS16 Hold Delay from ALE Low
nIOCS16 Output Delay from ALE Low
Address Hold from ALE Low
nCS Setup to ALE Low
Address Setup to ALE Low
MUST BE: BUSTMG pin = HIGH and RBUSTMG bit = 0
opr
t11
if SLOW ARB = 1
t1
VALID
opr
t3
if SLOW ARB = 0
DATASHEET
t15
t2,
t4
Parameter
t5
t9
Invalid
t16
Page 59
t6
ARB
from the trailing edge of nDS to
VALID DATA
t12
t13
Valid Value
4T
min
10
10
20
20
60
20
20
10
10
10
15
0
ARB
t8
0
*
max
40
40
20
t7
t10
Note 2
units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
t14
Revision 09-27-07