MC68MH360RC25L Freescale Semiconductor, MC68MH360RC25L Datasheet - Page 91

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MC68MH360RC25L

Manufacturer Part Number
MC68MH360RC25L
Description
IC MPU QUICC 25MHZ 241-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68MH360RC25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
241-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Chapter 6
QMC Initialization
60
60
This section describes the essential steps to initialize QMC after a hard reset. Section 6.1,
“Initialization Steps,” discusses the steps required to initialize the QMC protocol, and
Section 6.2, “68MH360 T1 Example,” provides example code.
6.1 Initialization Steps
This section describes the steps required to initialize the QMC protocol.
Step 1: Initialize the SIMODE (serial interface mode) register. The SIMODE register is
defined on page 7-78 of the MC68360 User’s Manual, and page 16-114 of the MPC860
user’s manual. Table 6-1 shows the transmit buffer descriptor field descriptions.
SMCx
SMCxCS
SDMx
RFSDx
DSCx
CRTx
STZx
CEx
FEx
GMx
TFSDx
Name
Table 6-1. Transmit Buffer Descriptor Field Descriptions
No. of Bits
Freescale Semiconductor, Inc.
For More Information On This Product,
1
3
2
2
1
1
1
1
1
1
2
Connect to TDM or NMSI
Specify clock source
Normal, echo, or loopback mode
Receive frame sync delay
Double-speed clock (GCI)
Common transmit and receive sync & clk
Set L1TXDx to until serial clks
Clock edge for xmit
Frame sync edge
Grant mode support
Transmit frame sync delay
Go to: www.freescale.com
Chapter 6. QMC Initialization
Description
X
X
00
System-specific
System-specific
System-specific
0
System-specific
System-specific
0
System-specific
Setting

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