MC68MH360RC25L Freescale Semiconductor, MC68MH360RC25L Datasheet - Page 67

• Manufacturer Part Number: MC68MH360RC25L
• Description: IC MPU QUICC 25MHZ 241-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360RC25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 241-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

RESET:
4.3 Interrupt Table Entry
The interrupt table contains information about channel-specific events. Its flags are shown
in Figure 4-4. Note that some bits have no meaning when operating in transparent mode.
For more detailed description on which bits are used in HDLC and transparent operation,
refer to Section 2.4, “Channel-Specific Parameters.” Table 4-2 describes the fields of an
interrupt table entry.
V
0
1
2
0
0
Field
Note: For the 68360, the bit numbering is reversed. See Appendix A for more information.
Note: For the 68360, the bit numbering is reversed. See Appendix A for more information.
W
1
0
V
W
NID
Name
NID
2
0
Valid bit
0 = Entry is not valid.
1 = Valid entry containing interrupt information.
Upon generating a new entry, the RISC processor sets this bit. The V bit is cleared by the host
immediately after it reads the interrupt flags in this entry (before processing the interrupt). The
V bits in the queue are host-initialized. During the initialization procedure, the host must clear
those bits in all queue entries.
Wrap bit
0 = This is not the last entry in the circular interrupt table.
1 = This is the last circular interrupt table entry. The next event’s entry is written/read (by RISC/
During initialization, the host must clear all W bits in the queue except the last one which must
be set. The length of the queue is left to the user and can be a maximum of 64 Kbytes.
Not idle
0 = No NID event has occurred.
1 = A pattern which is not an idle pattern was identified.
NID interrupts are not generated in transparent mode.
Table 4-2. Interrupt Table Entry Field Descriptions
IDL
Freescale Semiconductor, Inc.
3
0
host) from the address contained in INTBASE.
For More Information On This Product,
0
—
4
0
Figure 4-4. Interrupt Table Entry
1
Figure 4-3. SCCM Register
5
0 0
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Chapter 4. QMC Exceptions
2
CHANNEL NUMBER
6
0
3
7
IQOV
4
8
0
Description
GINT
9
0
5
MRF
GUN
10
0
6
11
UN
GOV
0
7
RXF
12
0
BSY
13
0
TXB
14
0
RXB
15
0